Hi,
looking for ASIC design engineers to join Altera Corp. in San Jose.
5-15 years working experience,
past design/verification experience on serial interface protocols,
40nm/28nm/20nm sub-deep micron design flow knowledge,
PHY design knowledge is a plus,
ASIC EDA tools knowledge helps,
VMM/UVM verification knowledge is a plus,
team player
please forward your resume to ningxue2000@yahoo.com.
principals only please.
thanks,
Ning
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