I have an immediate design engineer open position. Please forward resume to wding@altera.com.
Following is the job description.
As a Member of Technical Staff Engineer, you will be involved in the design and integration of Altera’s next generation FPGA devices. You will work as part of a team on the design and integration of building blocks within a FPGA. Your responsibilities will include, but are not limited to, the following:
- Logic/DFT/DFX design
- Synthesis/STA
- Chip-level floorplanning
- Chip-level timing closure
- Interfacing with software/design/backend teams for product integration at chip-level
The successful candidate’s minimum qualifications will include:
- BSEE or equivalent with a minimum of 8 years experience in IC development
- Strong background in ASIC development, with experience in the entire design cycle (RTL/Synthesis/STA/PnR) from concept to product release is required
- Strong communication (verbal and written) skills are an integral part of this position
________________________________
Confidentiality Notice.
This message may contain information that is confidential or otherwise protected from disclosure. If you are not the intended recipient, you are hereby notified that any use, disclosure, dissemination, distribution, or copying of this message, or any attachments, is strictly prohibited. If you have received this message in error, please advise the sender by reply e-mail, and delete the message and any attachments. Thank you.
This message may contain information that is confidential or otherwise protected from disclosure. If you are not the intended recipient, you are hereby notified that any use, disclosure, dissemination, distribution, or copying of this message, or any attachments, is strictly prohibited. If you have received this message in error, please advise the sender by reply e-mail, and delete the message and any attachments. Thank you.
__._,_.___
No comments:
Post a Comment