[Tsinghua-NC] Fortinet is hiring ASIC Design Engineers
City | Sunnyvale, CA |
Job Status | Full Time Regular |
|
|
Position Overview | Job Duties: - ASIC architecture research, analysis and specification.
- High performance and high quality ASIC design from specification to RTL implementation.
- ASIC verification, synthesis and timing analysis.
- IP evaluation, verification and integration.
- Back-end ASIC vendor support.
- System/board level bring up, debugging and support.
Job Experience Required: - Strong tracking record of ASIC design from concept to mass production.
- Hands-on experience on Verilog HDL coding and verification.
- Experience of high performance ASIC design from specification to system bringing up.
- FPGA design experience to verify large scale ASIC.
- Networking concept and protocols knowledge.
- Highly motivated, positive, detail oriented and responsible.
- Good team player and good communication skills.
- Familiar with C programming is a plus.
- 6 years or more networking or processor experience.
Educational Requirement: - MSEE/MSCS or BSEE with more years experience.
|
__._,_.___
------
Tsinghua Alumni Association of Northern California
Group policy: http://www.tsinghua-nc.org/about/email __,_._,___
No comments:
Post a Comment