[Tsinghua-NC] Silicon Image Wireless division openings

Job openings at Silicon Image for the 60GHz wireless communication domain.

Please also send your resume to tingkuo.lo@siliconimage.com or chihyuan.hsieh@siliconimage.com for the application.

 

Senior Engineer or Staff Engineer for Digital MAC Design

We are looking for a person to join a design team to execute a state-of-the-art IC design project in the wireless communication field.  Candidate must be familiar with digital IC design flow with a proven record of design and verification of a complex design project that led to successful silicon.  Proficiency in Verilog is required. 

 

Requirements:

Experience in the following areas of expertise is desired:

·        Wireless media access control (MAC) design experience would be highly desirable

·         Audio/Video and Ethernet applications

·         RTL design, verification, and chip integration

·         Co-simulation/verification with wireless MAC and video algorithms

Experience in the following is beneficial but not necessary requirement:

·         FPGA design flow, testing and emulation

·         Communication systems and RF systems

·         Knowledge of interface protocols such as PCI/PCIe/MIPI/HDMI would be a plus

·         Familiarity with wireless communication systems and standards (802.11b/g/n, WiGig, and WirelessHD)

Candidates must have MSEE degree with at least 7 years of experience or Ph.D. in EE with related experience. 

 

 

Senior Engineer or Staff Engineer for SOC Design

We are looking for a versatile and motivated individual to join a design team to execute a state-of-the-art IC design project in the wireless communication field.  Candidate must be familiar with digital IC design flow with design/ verification/emulation/synthesis/STA/LEC contributions on a complex design project that led to successful silicon.  Proficiency in Verilog is necessary. Familiarity with embedded CPUs, PCI/PCIe, and MIPI/HDMI video-interface protocols would be a big plus.   

 

 

Job Description:

·         RTL design and verification for the embedded CPU subsystem in the wireless baseband ASIC

·         RTL design and verification associated with top-level/centralized blocks and integration of third-party/in-house IPs (e.g., PCI/PCIe/MIPI/HDMI)

·         Chip-level methodology (clocks, resets, test planning)

·         Synthesis/STA/LEC/DFT implementation

·         FPGA prototyping

·         Silicon Validation

 

Requirements:

·         MSEE with 3+ years related experience

·         Prior experience with subsystems built around embedded processors (Tensilica/ARM/MIPS) would be highly desirable

·         Hands on experience on synthesis/STA/LEC/DFT would be highly desirable

·         FPGA emulation/debug experience would be desirable

·         Well organized, methodical, and detail oriented

·         Must be a team player and easy to work with

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