[Tsinghua-NC] Two FPGA contractor positions(full time preferred) in Juniper Networks

Hi Dear Alumni and Friends,

There are two immediate contractor FPGA openings in Juniper
Networks(www.juniper.net). These positions are located in Sunnyvale,
California.

FPGA Designer Contractor Position(Full time preferred, and potential
converting to full time employee):

FPGA Designer engineer to develop complex networking FPGAs for Juniper
security products.
Responsibilities:
- Design new high-speed networking FPGAs for highend Juniper security products;
- Be involved in all phases of the project from requirements analysis,
architecture and fucntional spec, through coding, thesis, place and
route, timing closure.
- Enhance and support existing products to address immediate customer
needs and challenges on an as-needed basis.
Requirements:
- Design experience in networking and security products, IO, or
switching modules;
- Ability to code-up complex designs using Verilog, and experiences
with some or all related EDA tools, Perl/shell scripts;
- Excellent lab debug skills, experience with simulation and hardware
verification/validation methodologies, test benches, and techniques;
- Current knowledge of Xilinx and Altera FPGAs and their respective tools;
- Successful experience in releasing FPGA designs to the field;
- Outstanding verbal, written communication and presentation skills;
- Networking experience is highly desirable, but nor required
- Requires a BS/MS EE or equivalent and a minimum of 5+ years of
FPGA/ASIC design experience

FPGA Verification Contractor Position(Full time preferred):
FPGA Verification Engineer to develop test topologies and verification
environment for complex networking FPGAs in Juniper security products.
Responsibilities:
- Perform FPGA verification for large and complex FPGA for Juniper
security products;
- Develop detailed test plans, block and system-level test benches,
reference models and verification environments;
- Develop functional models for system level architectural validation;
- Support ASIC and system bringup;
- Develop modeling/verification/coverage methodology;
- Enhance and support existing products to address immediate customer
needs and challenges on an as-needed basis.
Requirements:
- Strong Verilog, Perl/shell scripting and object oriented programming skills
- Strong System C or C++ skills
- Outstanding verbal, written communication and presentation skills;
- Current knowledge of Xilinx and/or Altera FPGAs is a plus
- Networking experience highly desirable
- Track record of successfully validating multiple ASIC/FPGAs
- Requires a BS/MS EE or equivalent and a minimum 5+ of verification experience

Please email me resume if you or your friends are interested, I can
help to forward to the hire manager.

Thanks
Xianzhi

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