There are several digital backend, layout and program manager job openning in TSMC North America. If you are interested in those position, I can help to referral.
P&R Sr. Engineers/Technical Managers: (LOCATIONS: San Jose Design Center or Hsinchu)
Responsibilities:
Will be responsible for ASIC integration/implementation projects, and TSMC design methodology build-up.
MS or above in EE/CS. For Sr. Engineer positions, must have 5-10+ years of related experience. For manager positions, 10~15+ years of chip physical implementation experience. Be an expert in ASIC RTL-to-GDS design flow. Fluent with Synopsys/Cadence Synthesis/APR tools/flows. Skilled in Tcl/Perl utility program coding. Experienced with TSMC 40nm technology. Experienced in chip integration and signoff. Proven record in multi-million gate design production tapeouts. Innovative in APR design methodology. Experienced in any of the following is a plus:
- TSMC 28nm technology
- Mobile application processor's eCPU/eGPU implementation
- Low-power implementation methodology
- Application processor implementation
- Advanced timing methodology
Other Requirements:
Must be service driven and able to interface with customer on specs/signoff/job scope discussion. Must have good communication skills, and can take tapeout pressure and work independently.
Layout Engineers: (LOCATION: San Jose Design Center - SJDC)
Responsibilities:
Provide on site support for customer's layout projects. Provide support to HQ on IP/Libraries development. Design rule evaluation and impact analysis.
Requirements:
A Bachelor's degree with 5+ years of experience in Mixed-Signal and SRAM layout. Experience with standard cell layout a plus. Strong communication skills. Bilingual in Mandarin a plus.
Program Manager: (LOCATION: San Jose)
Responsibilities:
Act as the Technical Program Manager for BCD and PMIC. Work with BD/RD/Sales to support customers' product design requests. Manage program with BD, RD and DTP to fulfill customers' needs and provide solutions. Proactively provide market/product feedback to HQ in Taiwan. Provide training to sales teams.
Requirements:
MS with 8+ yrs in the semiconductor field. Must have good understanding on device physics, process and design support. Customer-oriented attitude with good communication and presentation skills. Must have project management skills. RD or product experience in HV/BCD technology or design preferred.
Customer Support Specialist: (LOCATION: San Jose)
Responsibilities:
Order entry and maintenance. Shipment release. Customer order and delivery management. Daily logistics support and follow-ups. Account coordination and execution of daily operations and problem solving. Customer relationship and partnership development. Customer visit and quarterly business review. Disposition management. Customer Support Specialist group projects involvement and participation.
Requirements:
A bachelor's degree with 2 years related experience (preferably in the semiconductor industry). Must be computer literate. Must have excellent communication skills and be extremely detail oriented. Mandarin speaking/writing is a plus.
P&R Sr. Engineers/Technical Managers: (LOCATIONS: San Jose Design Center or Hsinchu)
Responsibilities:
Will be responsible for ASIC integration/implementation projects, and TSMC design methodology build-up.
MS or above in EE/CS. For Sr. Engineer positions, must have 5-10+ years of related experience. For manager positions, 10~15+ years of chip physical implementation experience. Be an expert in ASIC RTL-to-GDS design flow. Fluent with Synopsys/Cadence Synthesis/APR tools/flows. Skilled in Tcl/Perl utility program coding. Experienced with TSMC 40nm technology. Experienced in chip integration and signoff. Proven record in multi-million gate design production tapeouts. Innovative in APR design methodology. Experienced in any of the following is a plus:
- TSMC 28nm technology
- Mobile application processor's eCPU/eGPU implementation
- Low-power implementation methodology
- Application processor implementation
- Advanced timing methodology
Other Requirements:
Must be service driven and able to interface with customer on specs/signoff/job scope discussion. Must have good communication skills, and can take tapeout pressure and work independently.
Layout Engineers: (LOCATION: San Jose Design Center - SJDC)
Responsibilities:
Provide on site support for customer's layout projects. Provide support to HQ on IP/Libraries development. Design rule evaluation and impact analysis.
Requirements:
A Bachelor's degree with 5+ years of experience in Mixed-Signal and SRAM layout. Experience with standard cell layout a plus. Strong communication skills. Bilingual in Mandarin a plus.
Program Manager: (LOCATION: San Jose)
Responsibilities:
Act as the Technical Program Manager for BCD and PMIC. Work with BD/RD/Sales to support customers' product design requests. Manage program with BD, RD and DTP to fulfill customers' needs and provide solutions. Proactively provide market/product feedback to HQ in Taiwan. Provide training to sales teams.
Requirements:
MS with 8+ yrs in the semiconductor field. Must have good understanding on device physics, process and design support. Customer-oriented attitude with good communication and presentation skills. Must have project management skills. RD or product experience in HV/BCD technology or design preferred.
Customer Support Specialist: (LOCATION: San Jose)
Responsibilities:
Order entry and maintenance. Shipment release. Customer order and delivery management. Daily logistics support and follow-ups. Account coordination and execution of daily operations and problem solving. Customer relationship and partnership development. Customer visit and quarterly business review. Disposition management. Customer Support Specialist group projects involvement and participation.
Requirements:
A bachelor's degree with 2 years related experience (preferably in the semiconductor industry). Must be computer literate. Must have excellent communication skills and be extremely detail oriented. Mandarin speaking/writing is a plus.
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